The operating temperature of an integrated circuit (IC) affects both the life and the speed performance of the IC. Higher internal operating temperatures will shorten the life of an IC; elevated but safe temperatures often reduce the quality of performance in a circuit, for instance degrading frequency response or increasing distortion. Hence, manufacturers specify IC performance at a particular temperature and power consumption. IC users must then ensure adequate cooling to maintain their ICs within an acceptable range of temperatures.
Modern miniature IC packages allow great space savings in products by allowing more ICs to be placed on a given area of a printed circuit board (PCB). Unfortunately, high IC densities concentrate heat generated by the ICs into smaller spaces. This concentration of heat exacerbates the problem of ensuring adequate cooling. To make matters worse, ever increasing IC speeds and complexities promise to generate still more heat in still smaller spaces. Such problems demand careful attention in designing effective thermal management schemes.
A packaged IC comprises a semiconductor die enclosed within a package (e.g., a PLCC or BGA package) and leads that transmit signals to and from the die through the package. “Thermal resistance” is an important parameter in designing effective thermal management schemes for ICs. The thermal resistance of an IC mounted on a PCB (i.e., the “mounted thermal resistance”) represents the ability of the package to conduct heat away from the IC die through the package and package leads and into the surrounding environment. Mounted thermal resistance (θJA) of a packaged IC varies with die size, package type, and circuit board features, and can be computed using a well-known relationship among IC temperature, power consumption, and ambient temperature.
Various methods are used to estimate mounted thermal resistance of a packaged IC. These methods include resistive heating of a thermal test chip, thermal simulation of the packaged IC, and AC activity heating of the packaged IC. The thermal-test-chip method utilizes a packaged thermal die of a different type but of the same size as the actual packaged IC die. The thermal die has an on-chip temperature sensor for determining die temperature and resistors that resistively heat the thermal die.
The thermal-test-chip method of determining thermal resistance can be imprecise for a number of reasons. For example, the physical profile of an IC die is non-uniform. Non-uniform profiles drastically affect the way heat is transmitted through the die, and hence how the package conducts heat away from the die and into the environment; the thermal-test-chip method does not take this into account. Similarly, other differences between the form and function of the thermal test chip and the IC of interest can introduce measurement errors.
Thermal simulation of an IC and the board environment is another method that can be used to determine the thermal resistance of packaged ICs. Thermal simulation method is fast but can result in grossly erroneous thermal resistance values because of the difficulty of forming accurate models.
Some methods of measuring thermal resistance of a packaged IC use AC activity on the IC to heat the die. Such methods require a substantial portion of the IC be activated. This method has two major flaws: one, it can be difficult to produce uniform AC activity across the IC and, as a result, some regions of the IC may be at a higher temperature than others; two, AC activity causes substantial power fluctuations, which can introduce errors in the measurement of power consumed by the IC.
In light of the foregoing, there exists a need for a method of accurately determining the thermal resistance value of a packaged IC.